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ks86c4204/c4208/p4208 product overview 1 - 1 1 product overview sam87r i product family samsung ? s sam87ri family of 8-bit single-chip cmos microcontrollers offers a fast and efficient cpu, a wide range of integrated peripherals, and various mask-programmable rom sizes. a address/data bus architecture and a large number of bit- configurable i/o ports provide a flexible programming environment for applications with varied memory and i/o requirements. timer/counters with selectable operating modes are included to support real-time operations. ks86c4204/c4208/p4208 microcontroller the ks86c4204/c4208/p4208 single-chip 8-bit microcontroller is fabricated using an advanced cmos process. it is built around the powerful sam87ri cpu core. the ks86c4204/c4208/p4208 is a versatile microcontroller , with its a/d converter, sio, iic and a zero-crossing detection capability it can be used in a wide range of general purpose applications. stop and idle power-down modes were implemented to reduce power consumption. to increase on-chip register space, the size of the internal register file was logically expanded. the ks86c4204/c4208/p4208 have 4-kbyte or 8-k byte of program memory on-chip (rom) and 208-bytes of general purpose register area ram . using the sam87ri design approach, the following peripherals were integrated with the sam87ri core: ? four configurable i/o ports (24 pins ) ? nine interrupt s ources with one vector and one interrupt level ? two 8-bit timer/counter with various operating modes ? analog to digital converter with 12 input channels and 10-bit resolution ? one synchronous sio module ? one iic module ? two 12-bit pwm output the ks86c4204/c4208/p4208microcontroller is ideal for use in a wide range of electronic applications requiring simple timer/counter, pwm, adc, sio, iic, zcd and capture functions. ks86c4204/c4208/p4208 is available in a 28/32- pin sop and a 30-pin sdip package. otp the KS86P4208 is an otp (one time programmable) version of the ks86c4204/c4208 microcontroller. the KS86P4208 has on-chip 8-kbyte one-time-programmable eprom instead of masked rom. the KS86P4208 is fully compatible with the ks86c4204/c4208, in function, in d.c. electrical characteristics and in pin configuration.
product overview ks86c4204/c4208/p4 208 1 - 2 features cpu ? sam87ri cpu core memory ? 208-byte general purpose register area (ram) ? 4k/8k byte internal program memory (rom) instruction set ? 41 instructions ? the sam87ri core provides all the sam87 core instruction except the word-oriented instruction, multiplication, division, and some one-byte instruction instruction execution time ? 375 n s at 16 mhz fosc(minimum) interrupts ? 9 interrupt sources and 1 vector ? one interrupt level general i/o ? four i/o ports (total 24 pins ) ? bit programmable ports serial i/o ? one synchronous serial i/o module ? selectable transmit and receive rates multi-master iic-bus ? serial peripheral interface zero-crossing detection circuit ? zero crossing detection circuit that generates a digital signal in synchronism with an ac signal input built-in reset circuit (lvd) ? low voltage detector for safe reset timer/counters ? one 8-bit basic timer for watchdog function ? one 8-bit timer/counter with three operating mode ? one 8-bit timer/counter pwm module ? 12-bit pwm 2-ch (max: 250khz) ? 6-bit base + 6-bit extension frame ? one 8-bit timer/counter a/d converter ? 12 analog input pins ? 10-bit conversion resolution buzzer frequency range ? 200 hz to 20 khz signal can be generated oscillator freqeuncy ? 1-mhz to 16-mhz external crystal oscillator maximum 16-mhz cpu clock ? rc: 4mhz( typ) operating temperature range ? ? 4 0 c to + 85 c operating voltage range ? 3.0 v to 5.5 v (lvd) ? 1.8 v to 5.5 v (no lvd) otp interface protocol spec ? serial otp package types ? ks86c4204/c4208 32-pin sop-450 (3v lvd) 30-pin sdip-400 (3v lvd) 28-pin sop-375
ks86c4204/c4208/p4208 product overview 1 - 3 block diagram port 0 4k/8k rom 208-byte register file port 1 timer 1 basic timer timer 0 osc adc buz pwm p0.0-p0.7 sck,so, si, ad8-ad11 port 2 port 3 zcd iic sio p1.0-p1.3 t0, buz, int0, int1 port i/o and interrupt control sam87ri cpu x in x out t0 (cap) t0(pwm) ad0-ad11 p1.1/buz p0.7/pwm0 p1.3/pwm1 p2.0-p2.7 ad0-ad7 p3.0-p3.3 zcd p2.7/sclk p2.6/sdat p0.0/sck p0.1/so p0.2/si figure 1 -1 . block diagram
product overview ks86c4204/c4208/p4 208 1 - 4 pin assignments ks86c4204 /c4208 32-sop (top view) v ss x in x out test p0.1/so p0.0/sck reset p3.0 p3.2 p2.0/ad0 p2.1/ad1 p2.2/ad2 p2.3/ad3 p2.4/ad4 p2.5/ad5 av ss 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 v dd p0.2/si p0.3/clo p0.4/ad8 p0.5/ad9 p0.6/ad10 p0.7/ad11/pwm0 p3.1 p3.3 p1.0/t0/zcd p1.1/buz p1.2/int0 p1.3/int1/pwm1 p2.7/ad7/sclk p2.6/ad6/sdat av ref 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 figure 1 -2 . pin assignment diagram ( 32 -pin so p package)
ks86c4204/c4208/p4208 product overview 1 - 5 pin assignments (continued) v ss x in x out test p0.1/so p0.0/sck reset p3.0 p2.0/ad0 p2.1/ad1 p2.2/ad2 p2.3/ad3 p2.4/ad4 p2.5/ad5 av ss v d d p0.2/si p0.3/clo p0.4/ad8 p0.5/ad9 p0.6/ad10 p0.7/ad11/pwm0 p3.1 p1.0/t0/zcd p1.1/buz p1.2/int0 p1.3/int1/pwm1 p2.7/ad7/sclk p2.6/ad6/sdat av ref ks88c4204 /c4208 30-sdip (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 figure 1 -3 . pin assignment diagram ( 30 -pin sdip package) ks88c4204 /c4208 28-sop (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 v ss x in x out test p0.1/so p0.0/sck reset p2.0/ad0 p2.1/ad1 p2.2/ad2 p2.3/ad3 p2.4/ad4 p2.5/ad5 av ss v d d p0.2/si p0.3/clo p0.4/ad8 p0.5/ad9 p0.6/ad10 p0.7/ad11/pwm0 p1.0/t0/zcd p1.1/buz p1.2/int0 p1.3/int1/pwm1 p2.7/ad7/sclk p2.6/ad6/sdat av ref figure 1 -4 . pin assignment diagram ( 28 -pin sop package)
product overview ks86c4204/c4208/p4 208 1 - 6 pin descriptions table 1 - 1. ks86c4204/c4208/p4208 pin descriptions pin names pin type pin description pin type share pins p0.0-p0.7 i/o bit-programmable i/o port for schmitt trigger input or push-pull, open-drain output. pull-up resistors are assignable by software. e e-1 sck,so,si , clo, ad8-ad11 p1.0-p1.3 i/o bit-programmable i/o port for schmitt trigger input or push-pull output. pull-up resistors are assignable by software. port 1 pins can also be used as alternative functions. d t0/zcd buz int0 int1 p2.0-p2.7 i/o bit-programmable i/o port for schmitt trigger input or push-pull , open drain output. pull up resistors are assignable by software. port 2 can also be used as external interrupt, a/d input . e-1 ad0-ad7 p3.0-p3.3 o push-pull or open-drain output port. pull-up resistors are assignable by software. e-2 ? x in , x out ? crystal/ceramic, or rc oscillator signal for system clock. ? ? reset i system reset signal input pin. b ? test i test signal input pin (for factory use only: must be connected to v ss ) ? ? av ref , a v ss ? a/d converter reference voltage input and ground ? ? v dd , v ss ? voltage input pin and ground ? ? sck i/o serial interface clock input or output e p0.0 so o serial data output e p0.1 si i serial data output e p0.2 clo o system clock output port e p0.3 sclk sdat i/o iic clock iic data e-1 p2.7 p2.6 buz o 200 hz-20 khz frequency output for buzzer sound. d p1.1 zcd i zero crossing detector input d p1.0 t0 i/o timer 0 capture input or 10-bit pwm output d p1.0 int0 int1 i external interrupt input d p1.2 p1.3 pwm0 pwm1 o 12-bit pwm output e-1 d p0.7 p1.3 ad0-ad11 i a/d converter input e-1 p2.0-p2.7 p0.4-p0.7
ks86c4204/c4208/p4208 product overview 1 - 7 pin circuits p-channel n-channel in v dd figure 1 -5 . pin circuit type a last developing: 99.02.02 in v dd pull-up resistor figure 1 -6 . pin circuit type b p-channel n-channel v dd out output disable data figure 1 -7 . pin circuit type c i/o output disable data circuit type c resistor enable v dd data p-channel pull-up resistor figure 1-8. pin circuit type d
product overview ks86c4204/c4208/p4 208 1 - 8 v dd pull-up enable v dd i/o pne output disable data p-ch pull-up resistor input n-ch figure 1 -9 . pin circuit type e v dd pull-up enable v dd i/o pne output disable data p-ch pull-up resistor input n-ch analog input figure 1 -10 . pin circuit type e-1 v dd pull-up enable v dd out pne data 47k output disable figure 1 -11 . pin circuit type e-2
ks86c4204/c4208/p4208 electrical data 1 6- 1 1 6 electrical data overview in this section, the following ks86c4204/c4208/p4208 electrical characteristics are presented in tables and graphs: ? absolute maximum ratings ? d.c. electrical characteristic s ? a.c. electrical characteristics ? operating voltage range ? schmitt trigger input characteristics ? oscillator characteristics ? oscillation stabilization time ? data retention supply voltage in stop mode ? stop mode release timing when initiated by a reset ? power-on reset circuit characteristics ? a/d converter electrical characteristics ? zero-crossing detector ? zero crossing waveform diagram
electrical data ks86c4204/c4208/p4 208 1 6- 2 table 1 6- 1. absolute maximum ratings (t a = 25 c) parameter symbol conditions rating unit supply voltage v dd ? ? 0.3 to + 6.5 v input voltage v i all input ports ? 0.3 to v dd + 0.3 v output v oltage v o all output ports ? 0.3 to v dd + 0.3 v output c urrent i oh one i/o pin active ? 25 ma high all i/o pins active ? 80 output current i ol one i/o pin active + 30 ma l ow total pin current for ports 1, 2, 3 + 100 total pin current for ports 0 + 200 operating temperature t a ? ? 40 to + 85 c storage temperature t stg ? ? 65 to + 150 c
ks86c4204/c4208/p4208 electrical data 1 6- 3 table 1 6- 2. d . c . electrical characteristics (30sdip, 32sop) (t a = ? 4 0 c to + 85 c, v dd = 3.0 v to 5.5 v) parameter symbol conditions min typ max unit input high v oltage v i h1 ports 0, 1, 2 and reset v dd = 3.0 to 5.5 v 0. 8 v dd ? v dd v v i h3 x in and x out v dd ? 0.1 input low v oltage v i l1 ports 0, 1, 2 and reset v dd = 3.0 to 5.5 v ? ? 0.2 v dd v v i l2 x in and x out 0.1 out put high v oltage v oh i oh = ? 10 m a ports 0-3 v dd = 4.5 to 5.5 v v dd ? 1. 5 v dd ? 0.4 ? v output low v oltage v o l i o l = 25 m a port 0-3 v dd = 4. 5 to 5.5 v ? 0.4 2.0 v input high leakage current i lih1 all input pins except i lih2 v in = v dd ? ? 1 m a i lih2 x in , x out v in = v dd 20 input low leakage current i lil1 all input pins except i lil2 and reset v in = 0 v ? ? ? 1 m a i lil2 x in , x out v in = 0 v ? 20 output high leakage current i loh all output pins v out = v dd ? ? 2 m a output low leakage current i lol all output pins v out = 0 v ? ? ? 2 m a pull-up resistor r p v in = 0 v port 0-2 v dd = 5 v 30 47 70 k w reset v dd = 5 v 100 200 350 supply current i dd1 run mode 16-mhz cpu clock v dd = 4.5 to 5.5 v ? 11 20 ma 4-mhz cpu clock v dd = 3 v 1.5 4 i dd2 idle mode 16-mhz cpu clock v dd = 4.5 to 5.5 v ? 3 8 4-mhz cpu clock v dd = 3.3 v 0.5 2 i dd3 stop mode v dd = 4.5 to 5.5 v ? 65 100 m a v dd = 3.3 v 45 80 note: d.c. electrical values for supply current (i dd1 to i dd3 ) do not include current drawn through internal pull-up resisters, output port drive current, zcd and adc.
electrical data ks86c4204/c4208/p4 208 1 6- 4 table 1 6-3 . d . c . electrical characteristics ( 28sop ) (t a = ? 40 c to + 85 c, v dd = 1.8 v to 5.5 v) parameter symbol conditions min typ max unit input high v oltage v i h1 ports 0, 1, 2 and reset v dd = 1.8 to 5.5 v 0. 8 v dd ? v dd v v i h3 x in and x out v dd ? 0.1 input low v oltage v i l1 ports 0, 1, 2 and reset v dd = 1.8 to 5.5 v ? ? 0.2 v dd v v i l2 x in and x out 0.1 out put high v oltage v oh i oh = ? 10 m a ports 0-3 v dd = 4.5 to 5.5 v v dd ? 1.0 v dd ? 0.4 ? v output low v oltage v o l i o l = 25 m a port 0-3 v dd = 4. 5 to 5.5 v ? 0.4 2.0 v input high leakage current i lih1 all input pins except i lih2 v in = v dd ? ? 1 m a i lih2 x in , x out v in = v dd 20 input low leakage current i lil1 all input pins except i lil2 and reset v in = 0 v ? ? ? 1 m a i lil2 x in , x out v in = 0 v ? 20 output high leakage current i loh all output pins v out = v dd ? ? 2 m a output low leakage current i lol all output pins v out = 0 v ? ? ? 2 m a pull-up resistor r p v in = 0 v port 0-2 v dd = 5 v 30 47 70 k w reset v dd = 5 v 100 200 350 supply current i dd1 run mode 16-mhz cpu clock v dd = 4.5 to 5.5 v ? 11 20 ma 3-mhz cpu clock v dd = 1.8 to 2.2 v 1 3 i dd2 idle mode 16-mhz cpu clock v dd = 4.5 to 5.5 v ? 3 9 3-mhz cpu clock v dd = 1.8 to 2.2 v 0.3 1.0 i dd3 stop mode v dd = 4.5 to 5.5 v ? 0.1 5 m a v dd = 3 v v dd = 1.8 to 2.2 v note: d.c. electrical values for supply current (i dd1 to i dd3 ) do not include current drawn through internal pull-up resisters, output port drive current, zcd and adc.
ks86c4204/c4208/p4208 electrical data 1 6- 5 table 1 6-4 . a . c . electrical characteristics (t a = ?4 0 c to + 85 c, v dd = 1.8 v to 5.5 v) parameter symbol conditions min typ max unit interrupt input high, low width t inth , t intl p ort 1v(int0, int1) v dd = 5v 10% ? 200 ? ns input l ow width t rsl ? input v dd = 5v 10% ? 1 ? us 0.8 v dd 0.2 v dd t intl t inth t rsl 1/t cpu note: the unit tcpu means one cpu clock period. figure 1 6-1 . input timing measurement points
electrical data ks86c4204/c4208/p4 208 1 6- 6 cpu clock 16mhz 8mhz 4mhz 3mhz 2mhz 1mhz 1 2 3 4 5 6 7 2.7 5.5 supply voltage (v) 1.8 4.5 figure 16-2. operating voltage range (ks86c4204/c4208) 0.3 v dd a = 0.2 v dd b = 0.4 v dd c = 0.6 v dd d = 0.8 v dd v out a 0.7 v dd v dd v ss b c d v in figure 16-3. schimtt trigger input characteristic diagram
ks86c4204/c4208/p4208 electrical data 1 6- 7 table 1 6-5 . oscillator characteristics (30sdip, 32sop) (t a = ? 40 c to + 85 c) oscillator clock circuit test condition min typ max unit main crystal or ceramic x in x out c1 c2 v dd = 4. 5 to 5.5 v v dd = 3.0 to 4.5 v 1 1 ? ? 16 8 mhz external clock (main system) x in x out v dd = 4. 5 to 5.5 v v dd = 3.0 to 4.5 v 1 1 ? ? 16 8 rc oscillator x in x out r v dd = 4.75 to 5.25 v tolerance: 10% ? 4 ? table 16-6. oscillation stabilization time (28sop) (t a = ? 40 c to + 85 c) oscillator clock circuit test condition min typ max unit main crystal or ceramic x in x out c1 c2 v dd = 4. 5 to 5.5 v v dd = 2.7 to 4.5 v v dd = 1.8 to 2.7 v 1 1 1 ? ? ? 16 8 3 mhz external clock (main system) x in x out v dd = 4. 5 to 5.5 v v dd = 2.7 to 4.5 v vdd = 1.8 to 2.7 v 1 1 1 ? ? ? 16 8 3 rc oscillator x in x out r v dd = 4.75 to 5.25 v tolerance: 10% ? 4 ?
electrical data ks86c4204/c4208/p4 208 1 6- 8 table 1 6-7 . oscillation stabilization time (t a = ? 40 c to + 85 c, v dd = 1.8 v to 5.5 v) oscillator test condition min typ max unit main crystal fosc > 1.0 mhz ? ? 20 ms main ceramic oscillation stabilization occurs when v dd is equal to the minimum oscillator voltage range. ? ? 10 external clock (main system) x in input high and low width (t xh , t xl ) 25 ? 500 ns oscillator stabilization t wait when released by a reset (1) ? 2 1 6 / f osc ? ms wait time t wait when released by an interrupt (2) ? ? ? notes : 1. fosc is the oscillator frequency. 2. the duration of the oscillator stabilization wait time, t wait , when it is released by an interrupt is determined by the setting in the basic timer control register, btcon.
ks86c4204/c4208/p4208 electrical data 1 6- 9 table 1 6-8 . data retention supply voltage in stop mode (t a = ? 40 c to + 85 c , v dd = 1.8 v to 5.5v ) parameter symbol conditions min typ max unit data retention supply voltage v dddr stop mode 1.8 ? 5.5 v data retention supply current i dddr stop mode; v dddr = 1.8 v ? 0.1 5 a note: supply current does not include current drawn through internal pull-up resistors or external output current loads. data retention mode ~ ~ ~ v dddr execution of stop instrction v dd normal operating mode oscillation stabilization time ~ stop mode internal reset operation reset t wait note: t wait is the same as 4096 x 16 x 1/fosc 0.8 v dd 0.2 v dd figure 1 6-4 . stop mode release timing when initiated by a reset
electrical data ks86c4204/c4208/p4 208 1 6- 10 table 1 6-9 . power-on reset circuit characteristics (t a = ? 40 c to + 85 c , v dd = 3.0 v to 5.5 v ) parameter symbol conditions min typ max unit power-on reset voltage high v dd h 3.0 ? 5.5 v power-on reset voltage low v ddl 0 2.6 3.0 v power supply voltage rise time t r 10 (1) us power supply voltage off time t off 0.5 s power-on reset circuit i ddpr v dd = 5 v 10% 65 100 m a cunsumption current (2) v dd = 3.3 v 45 80 notes: 1. 216/fx (= 6.55 ms at fx = 10 mhz) 2. current consumed when power-on reset circuit is provided internally. v dd v ddh v ddl t off t r figure16-5. power-on reset timing
ks86c4204/c4208/p4208 electrical data 1 6- 11 table 16-10. a/d converter electrical characteristics (t a = ? 40 c to + 85 c , v dd = 1.8/3.0 v to 5.5 v, v ss = 0 v ) parameter symbol test conditions min typ max unit total accuracy v dd = 5.12 v cpu clock = 10 mhz av ref = 5.12 v av ss = 0 v ? ? 3 lsb integral linearity error ile ? ? ? 2 lsb differential linearity error dle ? ? ? 1 offset error of top eot ? ? 1 3 offset error of bottom eob ? ? 1 2 conversion time (1) t con fosc = 10 mhz 20 ? ? m s analog input voltage v ian ? av ss ? av ref v analog input impedance r an ? 2 ? ? m w adc reference voltage av ref ? 2.5 ? v dd v adc reference ground av ss ? v ss ? v ss + 0.3 v analog input current i adin av ref = v dd = 5 v ? ? 10 m a adc block i adc av ref = v dd = 5 v ? 1 3 ma current (2) av ref = v dd = 3 v 0.5 1.5 av ref = v dd = 5 v power down mode ? 100 500 na notes: 1. ?conversion time? is the time required from the moment a conversion operation starts until it ends. 2. i adc is operating current during a/d conversion. 11 1111 1111 11 1111 1110 11 1111 1101 . . . . . . . 00 0000 0010 00 0000 0001 00 0000 0000 v eob av ss v 2 v (k-1) v (k) v eot av ref analog input digital output figure 16-6. definition of dle and ile
electrical data ks86c4204/c4208/p4 208 1 6- 12 table 16-11. zero crossing detector (t a = ? 40 c to + 85 c , v dd = 4.5 v to 5.5 v, v ss = 0 v ) parameter symbol test conditions min typ max unit zero-crossing detection input voltage v zc ac connection c = 0.1 m f 1.0 ? 3.0 vp-p zero-crossing detection accuracy v azc f zc = 60 hz (sine wave) v dd = 5 v f osc = 10 mhz ? ? 150 mv zero-crossing detection input frequency f zc ? 40 ? 200 hz 1/fzc v azc zcint ac input v az(p-p) figure 1 6-7 . zero crossing waveform diagram
ks86c4204/c4208/p4208 mechanical data 1 7- 1 1 7 mechanical data overview the ks86c4204/c4208 is available in a 30 -pin s dip package ( samsung: 30 - s dip- 4 00) and a 32 -pin so p package ( 32 - sop - 450a) and a 28-pin sop p ackage (28-sop-375). package dimensions are shown in figures 1 7- 1 , 17-2, and 17-3 note : dimensions are in millimeters. 27.88max 27.48 0 .2 1.778 (1.30) 0.51 min 3.30 0.3 3.81 0.2 5.08 max 0-15 1.12 0.1 0.25 + 0.1 - 0.05 10.16 #30 #16 #15 #1 30-sdip-400 0.56 0.1 8.94 0.2 figure 1 7- 1. 30 -pin s dip package dimensions
mechanical data ks86c4204/c4208/p42 08 1 7- 2 32-sop-450a #1 #16 #17 #32 2.40 max (0.43) 0.05 min 1.27 note: dimensions are in millimeters 19.90 0 .2 0.40 0 .1 12.00 0 .3 2.00 0 .2 11.43 0-8 8.34 0 .2 0.78 0 .2 0.20 + 0.1 - 0.05 figure 1 7- 2. 32 - sop-450a package dimensions
ks86c4204/c4208/p4208 mechanical data 1 7- 3 28-sop-375 #1 #14 #15 #28 note: dimensions are in millimeters 10.45 0 .3 7.70 0 .2 0.60 0 .2 0.15 + 0.10 - 0.05 2.50 max (0.56) 0.05 min 17.62 0 .2 0.41 0 .1 2.15 0 .1 18.02 max 1.27 9.53 8 figure 1 7-3 . 28 - sop-375 package dimensions
mechanical data ks86c4204/c4208/p42 08 1 7- 4 notes
ks86c4204/c4208/p4208 KS86P4208 otp 18- 1 18 KS86P4208 otp overview the KS86P4208 single-chip cmos microcontroller is the otp (one time programmable) version of the ks86c4204/c4208 microcontroller. it has an on-chip otp rom instead of masked rom. the eprom is accessed by serial data format. the KS86P4208 is fully compatible with the ks86c4204/c4208, both in function and in pin configuration. because of its simple programming requirements, the KS86P4208 is ideal for use as an evaluation chip for the ks86c4204/c4208. v ss x in x out test / v pp p0.1/so p0.0/sck reset p3.0 p2.0/ad0 p2.1/ad1 p2.2/ad2 p2.3/ad3 p2.4/ad4 p2.5/ad5 av ss v d d p0.2/si/ scl p0.3/clo/ sda p0.4/ad8 p0.5/ad9 p0.6/ad10 p0.7/ad11/pwm0 p3.1 p1.0/t0/zcd p1.1/buz p1.2/int0 p1.3/int1/pwm1 p2.7/ad7/sclk p2.6/ad6/sdat av ref KS86P4208 30-sdip (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 note: the bolds indicate an otp pin name. figure 1 8-1 . pin assignment diagram ( 30 -pin s dip package)
KS86P4208 otp ks86c4 204/c4208/p4208 18- 2 v ss x in x out test/v pp p0.1/so p0.0/sck reset p3.0 p3.2 p2.0/ad0 p2.1/ad1 p2.2/ad2 p2.3/ad3 p2.4/ad4 p2.5/ad5 av ss v d d p0.2/si/ scl p0.3/clo/ sda p0.4/ad8 p0.5/ad9 p0.6/ad10 p0.7/ad11/pwm0 p3.1 p3.3 p1.0/t0/zcd p1.1/buz p1.2/int0 p1.3/int1/pwm1 p2.7/ad7/sclk p2.6/ad6/sdat av ref KS86P4208 32-sop (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 note: the bolds indicate an otp pin name. figure 1 8-2 . pin assignment diagram ( 32 -pin sop package) v ss x in x out test/v pp p0.1/so p0.0/sck reset p2.0/ad0 p2.1/ad1 p2.2/ad2 p2.3/ad3 p2.4/ad4 p2.5/ad5 av ss v d d p0.2/si/ scl p0.3/clo/ sda p0.4/ad8 p0.5/ad9 p0.6/ad10 p0.7/ad11/pwm0 p1.0/t0/zcd p1.1/buz p1.2/int0 p1.3/int1/pwm1 p2.7/ad7/sclk p2.6/ad6/sdat av ref KS86P4208 28-sop (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 note: the bolds indicate an otp pin name. figure 1 8-3 . pin assignment diagram ( 28 -pin sop package)
ks86c4204/c4208/p4208 KS86P4208 otp 18- 3 table 18-1. descriptions of pins used to read/write the eprom main chip during programming pin name pin name pin no. i/o function p0.3 sdat KS86P4208 - 30 sdip: 28 - 32 sop: 30 i/o serial data pin (output when reading, input when writing) input and push-pull output port can be assigned p0.2 sclk KS86P4208 - 30 sdip: 29 - 32 sop: 31 i serial clock pin (input only pin) test v pp (test) 4 i power supply pin for eprom cell writing (indicates that otp enters into the writing mode). when 12.5 v is applied, otp is in writing mode and when 5 v is applied, otp is in reading mode. (option) reset reset 7 i chip initialization v dd /v ss v dd /v ss KS86P4208 - 30 sdip: 30/1 - 32 sop: 32/1 i logic power supply pin. table 18-2. comparison of KS86P4208 and ks86c4204/c4208 features characteristic KS86P4208 ks86c4204/c4208 program memory 8-kbyte eprom 4/8-kbyte mask rom operating voltage (v dd ) 3.0 v to 5.5 v (28 sop: 1.8 v to 5.5) 3.0 v to 5.5 v (28 sop: 1.8 v to 5.5) otp programming mode v dd = 5 v, v pp (test) = 12.5 v pin configuration 30 sdip/32 sop/28sop eprom programmability user program 1 time programmed at the factory operating mode characteristics when 12.5 v is supplied to the v pp (test) pin of the KS86P4208, the eprom programming mode is entered. the operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in table 18-3 below. table 18-3. operating mode selection criteria v dd v pp (test) reg/ mem address (a15-a0) r/ w mode 5 v 5 v 0 0000h 1 eprom read 12.5 v 0 0000h 0 eprom program 12.5 v 0 0000h 1 eprom verify 12.5 v 1 0e3fh 0 eprom read protection note: "0" means low level; "1" means high level.
KS86P4208 otp ks86c4 204/c4208/p4208 18- 4 notes

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